IC chips are electrically connected to the chip carriers to perform the required functions. Wire bonding (WB), tape automated bonding (TAB), and flip chip (FC) are the major electrical connections for the existing electronic packages. However, wire bonding is still the major electrical connections between the chip and the chip carrier in semiconductor packages. A substrate or a lead frame is used as a chip carrier to be external electrical connection media for IC chips. The bonding pads of a chip are electrically connected to the bonding fingers of a substrate or a lead frame by bonding wires formed by wire bonding technology to achieve electrical connections of IC chips.
Wire bonders are widely implemented in semiconductor packaging houses with numerous numbers. According to known researches, the equipment ratio of wafer saw machines, die bonders, and wire bonders is 1 to 4 to 16. Moreover, wire bonding is performed in automatic or semi-automatic. In the conventional wire bonding processes, once a wire bonder has wrong setting parameters causing poor bonding wires or fake bonding, it is very difficult to pin point out the malfunction wire bonder manually and quickly. If the malfunction wire bonder can not be found quickly, more bonding wires are wrongly wire bonded leading to more loss in materials, in packaging yields, and in scrapped packages. Therefore, it is very important to develop a set of methodology to quickly identify malfunction wire bonders. If barcodes or any foreign ID tags are stuck to the chip carriers, the barcodes or foreign IC tags will be easily lost or damaged during packaging processes, or contaminated the packages.